Merge branch 'master' of /home/wd/git/u-boot/custodians

[platform/kernel/u-boot.git] / include / configs / sequoia.h

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index f4eefae..d39a894 100644 (file)
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -113,17 +113,17 @@
  * Environment
  */
 #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
-#define CFG_ENV_IS_IN_FLASH    1       /* use FLASH for environ vars   */
+#define CONFIG_ENV_IS_IN_FLASH 1       /* use FLASH for environ vars   */
 #else
-#define CFG_ENV_IS_IN_NAND     1       /* use NAND for environ vars    */
-#define CFG_ENV_IS_EMBEDDED    1       /* use embedded environment     */
+#define CONFIG_ENV_IS_IN_NAND  1       /* use NAND for environ vars    */
+#define CONFIG_ENV_IS_EMBEDDED 1       /* use embedded environment     */
 #endif
 
 /*
  * FLASH related
  */
 #define CFG_FLASH_CFI                  /* The flash is CFI compatible  */
-#define CFG_FLASH_CFI_DRIVER           /* Use common CFI driver        */
+#define CONFIG_FLASH_CFI_DRIVER                /* Use common CFI driver        */
 
 #define CFG_FLASH_BANKS_LIST   { CFG_FLASH_BASE }
 
@@ -139,14 +139,14 @@
 #define CFG_FLASH_EMPTY_INFO         /* print 'E' for empty sector on flinfo */
 #define CFG_FLASH_QUIET_TEST   1       /* don't warn upon unknown flash      */
 
-#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE      0x20000 /* size of one complete sector        */
-#define CFG_ENV_ADDR           ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
-#define        CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector   */
+#ifdef CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE   0x20000 /* size of one complete sector        */
+#define CONFIG_ENV_ADDR                ((-CFG_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
+#define        CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector   */
 
 /* Address and size of Redundant Environment Sector    */
-#define CFG_ENV_ADDR_REDUND    (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE_REDUND    (CFG_ENV_SIZE)
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
 #endif
 
 /*
@@ -179,7 +179,7 @@
  * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
  */
 #define CFG_NAND_U_BOOT_OFFS   (16 << 10)      /* Offset to RAM U-Boot image */
-#define CFG_NAND_U_BOOT_SIZE   (384 << 10)     /* Size of RAM U-Boot image   */
+#define CFG_NAND_U_BOOT_SIZE   (512 << 10)     /* Size of RAM U-Boot image   */
 
 /*
  * Now the NAND chip has to be defined (no autodetection used!)
@@ -197,14 +197,14 @@
 #define CFG_NAND_ECCTOTAL      (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
 #define CFG_NAND_ECCPOS                {0, 1, 2, 3, 6, 7}
 
-#ifdef CFG_ENV_IS_IN_NAND
+#ifdef CONFIG_ENV_IS_IN_NAND
 /*
  * For NAND booting the environment is embedded in the U-Boot image. Please take
  * look at the file board/amcc/sequoia/u-boot-nand.lds for details.
  */
-#define CFG_ENV_SIZE           CFG_NAND_BLOCK_SIZE
-#define CFG_ENV_OFFSET         (CFG_NAND_U_BOOT_OFFS + CFG_ENV_SIZE)
-#define CFG_ENV_OFFSET_REDUND  (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#define CONFIG_ENV_SIZE                CFG_NAND_BLOCK_SIZE
+#define CONFIG_ENV_OFFSET              (CFG_NAND_U_BOOT_OFFS + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #endif
 
 /*
@@ -422,12 +422,12 @@
 /* GPIO Core 1 */                                                                      \
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO32 USB2D_OPMODE0 EBC_DATA(2)     */      \
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO33 USB2D_OPMODE1 EBC_DATA(3)     */      \
-{GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1}, /* GPIO34 UART0_DCD_N   UART1_DSR_CTS_N UART2_SOUT*/ \
-{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
-{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO36 UART0_8PIN_CTS_N EBC_DATA(0)  UART3_SIN*/ \
-{GPIO1_BASE, GPIO_BI , GPIO_ALT2, GPIO_OUT_0}, /* GPIO37 UART0_RTS_N   EBC_DATA(1)     UART3_SOUT*/ \
-{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO38 UART0_DTR_N   UART1_SOUT      */      \
-{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO39 UART0_RI_N    UART1_SIN       */      \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO34 UART0_8PIN_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO36 UART0_CTS_N   EBC_DATA(0)     UART3_SIN*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO37 UART0_RTS_N   EBC_DATA(1)     UART3_SOUT*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO38 UART0_8PIN_DTR_N UART1_SOUT   */      \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO39 UART0_8PIN_RI_N UART1_SIN     */      \
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 UIC_IRQ(0)                    */      \
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 UIC_IRQ(1)                    */      \
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 UIC_IRQ(2)                    */      \