ppc4xx: Remove cache definition from 4xx board config files
[platform/kernel/u-boot.git] / include / configs / sequoia.h
index 3219992..72f01d9 100644 (file)
 #define CONFIG_SYS_CLK_FREQ    ((in8(CFG_BCSR_BASE + 3) & 0x80) ? \
                                33333333 : 33000000)
 
+#if 0
+/*
+ * 44x dcache supported is working now on sequoia, but we don't enable
+ * it yet since it needs further testing
+ */
+#define CONFIG_4xx_DCACHE                      /* enable dcache        */
+#endif
+
 #define CONFIG_BOARD_EARLY_INIT_F 1            /* Call board_early_init_f */
 #define CONFIG_MISC_INIT_R     1               /* Call misc_init_r     */
 
 /* Comment this out to enable USB 1.1 device */
 #define USB_2_0_DEVICE
 
-#define CMD_USB                        CFG_CMD_USB
-#else
-#define CMD_USB                        0       /* no USB on 440GRx             */
 #endif /* CONFIG_440EPX */
 
 /* Partitions */
 #define CONFIG_DOS_PARTITION
 #define CONFIG_ISO_PARTITION
 
-#define CONFIG_COMMANDS       (CONFIG_CMD_DFL  |       \
-                              CFG_CMD_ASKENV   |       \
-                              CFG_CMD_DHCP     |       \
-                              CFG_CMD_DTT      |       \
-                              CFG_CMD_DIAG     |       \
-                              CFG_CMD_EEPROM   |       \
-                              CFG_CMD_ELF      |       \
-                              CFG_CMD_FAT      |       \
-                              CFG_CMD_I2C      |       \
-                              CFG_CMD_IRQ      |       \
-                              CFG_CMD_MII      |       \
-                              CFG_CMD_NAND     |       \
-                              CFG_CMD_NET      |       \
-                              CFG_CMD_NFS      |       \
-                              CFG_CMD_PCI      |       \
-                              CFG_CMD_PING     |       \
-                              CFG_CMD_REGINFO  |       \
-                              CFG_CMD_SDRAM    |       \
-                              CMD_USB)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#ifdef CONFIG_440EPX
+#define CONFIG_CMD_USB
+#endif
+
+#ifndef CONFIG_RAINIER
+#define CFG_POST_FPU_ON                CFG_POST_FPU
+#else
+#define CFG_POST_FPU_ON                0
+#endif
 
 /* POST support */
 #define CONFIG_POST            (CFG_POST_MEMORY   | \
                                 CFG_POST_UART     | \
                                 CFG_POST_I2C      | \
                                 CFG_POST_CACHE    | \
-                                CFG_POST_FPU      | \
+                                CFG_POST_FPU_ON   | \
                                 CFG_POST_ETHER    | \
                                 CFG_POST_SPR)
 
 
 #define CONFIG_SUPPORT_VFAT
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
 /*-----------------------------------------------------------------------
  * Miscellaneous configurable options
  *----------------------------------------------------------------------*/
 #define CFG_LONGHELP                   /* undef to save memory         */
 #define CFG_PROMPT             "=> "   /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE             1024    /* Console I/O Buffer Size      */
 #else
 #define CFG_CBSIZE             256     /* Console I/O Buffer Size      */
  *----------------------------------------------------------------------*/
 /* General PCI */
 #define CONFIG_PCI                     /* include pci support          */
-#undef CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
+#define CONFIG_PCI_PNP                 /* do pci plug-and-play   */
+#define CFG_PCI_CACHE_LINE_SIZE        0 /* to avoid problems with PNP */
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup  */
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 #define CFG_EBC_PB2AP          0x24814580
 #define CFG_EBC_PB2CR          (CFG_BCSR_BASE | 0x38000)
 
+#define CFG_BCSR5_PCI66EN      0x80
+
 /*-----------------------------------------------------------------------
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CFG_NAND_BASE          (CFG_NAND_ADDR + CFG_NAND_CS)
 #define CFG_NAND_SELECT_DEVICE  1      /* nand driver supports mutipl. chips   */
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- *----------------------------------------------------------------------*/
-#define CFG_DCACHE_SIZE                (32<<10)  /* For AMCC 440 CPUs                  */
-#define CFG_CACHELINE_SIZE     32            /* ...                                */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5             /* log base 2 of the above value  */
-#endif
-
 /*
  * Internal Definitions
  *
 #define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
 #define BOOTFLAG_WARM  0x02            /* Software reboot                      */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2           /* which serial port to use */
 #endif