/*
* Copyright (C) 2003 ETC s.r.o.
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier: GPL-2.0+
* Written by Peter Figuli <peposh@etc.sk>, 2003.
*
* 2003/13/06 Initial MP10 Support copied from wepep250
#define CONFIG_ARM920T 1 /* this is an ARM920T CPU */
#define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */
#define CONFIG_SCB9328 1 /* on a scb9328tronix board */
-#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
#define CONFIG_IMX_SERIAL
#define CONFIG_IMX_SERIAL1
* Select serial console configuration
*/
-
/*
* BOOTP options
*/
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-
/*
* Command line configuration.
*/
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_SOURCE
-
/*
* Boot options. Setting delay to -1 stops autostart count down.
* NOTE: Sending parameters to kernel depends on kernel version and
#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */
#define CONFIG_SYS_MEMTEST_END 0x08F00000
-#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_BAUDRATE 115200
/*
* Definitions related to passing arguments to kernel.
#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
#define CONFIG_INITRD_TAG 1 /* send initrd params */
-#undef CONFIG_VFD /* do not send framebuffer setup */
-
/*
* Malloc pool need to host env + 128 Kb reserve for other allocations.
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) )
-
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-
-#define CONFIG_STACKSIZE (120<<10) /* stack size */
-
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */
-#endif
-
/* SDRAM Setup Values
0x910a8300 Precharge Command CAS 3
0x910a8200 Precharge Command CAS 2
#define SCB9328_SDRAM_1 0x08000000 /* SDRAM bank #1 */
#define SCB9328_SDRAM_1_SIZE 0x01000000 /* 16 MB */
-/*
- * Flash Controller settings
- */
-
-/*
- * Hardware drivers
- */
+#define CONFIG_SYS_TEXT_BASE 0x10000000
+#define CONFIG_SYS_SDRAM_BASE SCB9328_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (SCB9328_SDRAM_1 + 0xf00000)
/*
* Configuration for FLASH memory for the Synertronixx board
now.*/
#undef CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* timeout for Erase operation */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 /* timeout for Write operation */
#define CONFIG_SYS_FLASH_BASE SCB9328_FLASH_BASE
#define CONFIG_SYS_CS5U_VAL 0x00008400
#define CONFIG_SYS_CS5L_VAL 0x00000D03
-#define CONFIG_NET_MULTI 1
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x16000000
#define DM9000_IO CONFIG_DM9000_BASE