Merge branch 'master' of git://git.denx.de/u-boot-at91
[platform/kernel/u-boot.git] / include / configs / sbc8641d.h
index 752a905..0012945 100644 (file)
 #define CONFIG_SYS_CCSRBAR             0xf8000000      /* relocated CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
+#define CONFIG_SYS_CCSRBAR_PHYS_HIGH   0x0
+
 #define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR+0x8000)
 #define CONFIG_SYS_PCI2_ADDR           (CONFIG_SYS_CCSRBAR+0x9000)
 
 #define CONFIG_SYS_IBAT3L      (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CONFIG_SYS_IBAT3U      CONFIG_SYS_DBAT3U
 
+#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT \
+                                      | BATL_PP_RW | BATL_CACHEINHIBIT \
+                                      | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT \
+                                      | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT \
+                                      | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU
+#endif
+
 /*
  * BAT4         32M    Cache-inhibited, guarded
  * 0xe200_0000  16M    PCI-Express 1 I/O