Merge branch 'inka4x0-ng' of /home/m8/git/u-boot/

[platform/kernel/u-boot.git] / include / configs / sbc405.h

diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index beff28a..60d401f 100644 (file)
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -84,23 +84,33 @@
 
 #define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
-#define CONFIG_BOOTP_MASK      (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
 
 #define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_COMMANDS        ( CONFIG_CMD_DFL        | \
-                               CFG_CMD_BSP     | \
-                               CFG_CMD_ELF     | \
-                               CFG_CMD_I2C     | \
-                               CFG_CMD_IRQ     | \
-                               CFG_CMD_MII     | \
-                               CFG_CMD_PCI     | \
-                               CFG_CMD_PING    | \
-                               CFG_CMD_SDRAM   | \
-                               0 )
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
@@ -123,7 +133,7 @@
 #define CFG_PROMPT_HUSH_PS2    "> "
 #endif
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE     1024            /* Console I/O Buffer Size      */
 #else
 #define CFG_CBSIZE     256             /* Console I/O Buffer Size      */
@@ -224,16 +234,6 @@
 #define CFG_ENV_SIZE           0x40000 /* Total Size of Environment Sector     */
 
 /*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's   */
-                                       /* have only 8kB, 16kB is save here     */
-#define CFG_CACHELINE_SIZE     32      /* ...                                  */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
-#endif
-
-/*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  */
 #define FLASH0_BA      CFG_FLASH_BASE          /* FLASH 0 Base Address         */