#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \
+ GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_MASK_ALE BIT(21)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
#define CONFIG_SYS_NAND_ONFI_DETECTION
-
-#define CONFIG_MTD_DEVICE
#endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP 8
-#define CONFIG_PMECC_SECTOR_SIZE 512
-
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#ifdef CONFIG_SD_BOOT