include/: Remove obsolete references to CONFIG_COMMANDS

[platform/kernel/u-boot.git] / include / configs / rsdproto.h

diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h
index 95faa41..93f5c6b 100644 (file)
--- a/include/configs/rsdproto.h
+++ b/include/configs/rsdproto.h
@@ -37,6 +37,9 @@
 
 #define CONFIG_MPC8260         1       /* This is an MPC8260 CPU       */
 #define CONFIG_RSD_PROTO       1       /* on a R&S Protocol Board      */
+#define CONFIG_CPM2            1       /* Has a CPM2 */
+
+#define        CONFIG_MISC_INIT_F      1       /* Use misc_init_f()            */
 
 /*
  * select serial console configuration
@@ -61,8 +64,7 @@
  * for FCC)
  *
  * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
  */
 #undef CONFIG_ETHER_ON_SCC             /* define if ethernet on SCC    */
 #define        CONFIG_ETHER_ON_FCC             /* define if ethernet on FCC    */
@@ -99,7 +101,14 @@
 
 #define CONFIG_BAUDRATE                115200
 
-#define CONFIG_COMMANDS                (CONFIG_CMD_DFL & ~CFG_CMD_KGDB)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_KGDB
+
 
 /* Define this if you want to boot from 0x00000100. If you don't define
  * this, you will need to program the bootloader to 0xfff00000, and
@@ -109,15 +118,12 @@
  */
 #define CFG_RSD_BOOT_LOW 1
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
 #define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOTARGS        "devfs=mount root=ramfs"
 #define CONFIG_ETHADDR         08:00:3e:26:0a:5a
 #define CONFIG_NETMASK          255.255.0.0
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400          /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2               /* which serial port to use */
 #endif
@@ -127,7 +133,7 @@
  */
 #define        CFG_LONGHELP                            /* undef to save memory         */
 #define        CFG_PROMPT              "=> "           /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define        CFG_CBSIZE              1024            /* Console I/O Buffer Size      */
 #else
 #define        CFG_CBSIZE              256             /* Console I/O Buffer Size      */
@@ -211,16 +217,16 @@
 
 /* get the HRCW ISB field from CFG_IMMR */
 #define CFG_RSD_HRCW_IMMR ( ((CFG_IMMR & 0x10000000) >> 10) |\
-                            ((CFG_IMMR & 0x01000000) >> 7)  |\
-                            ((CFG_IMMR & 0x00100000) >> 4) )
+                           ((CFG_IMMR & 0x01000000) >> 7)  |\
+                           ((CFG_IMMR & 0x00100000) >> 4) )
 
 #define CFG_HRCW_MASTER        (HRCW_L2CPC10 | \
                         HRCW_DPPC11 | \
-                         CFG_RSD_HRCW_IMMR |\
-                        HRCW_MMR00 | \
-                        HRCW_APPC10 | \
-                        HRCW_CS10PC00 | \
-                        HRCW_MODCK_H0000 |\
+                        CFG_RSD_HRCW_IMMR |\
+                        HRCW_MMR00 | \
+                        HRCW_APPC10 | \
+                        HRCW_CS10PC00 | \
+                        HRCW_MODCK_H0000 |\
                         CFG_RSD_HRCW_BOOT_FLAGS)
 
 /* no slaves */
@@ -284,7 +290,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32      /* For MPC8260 CPU                      */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
 #endif
 
@@ -388,9 +394,9 @@
 /* Virtex-FPGA - Register */
 #define CFG_BR3_PRELIM  (PHYS_VIRTEX_REGISTER | BRx_V)
 #define CFG_OR3_PRELIM  (ORxS_SIZE_TO_AM(PHYS_VIRTEX_REGISTER_SIZE) | \
-                         ORxG_SCY_1_CLK | \
-                         ORxG_ACS_DIV2 | \
-                         ORxG_CSNT )
+                        ORxG_SCY_1_CLK | \
+                        ORxG_ACS_DIV2 | \
+                        ORxG_CSNT )
 
 /* local bus SDRAM */
 #define CFG_BR4_PRELIM (PHYS_SDRAM_LOCAL | BRx_PS_32 | BRx_MS_SDRAM_L | BRx_V)