#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff1b00a0
#define CONFIG_IRAM_BASE 0xfff80000
#define CONFIG_SYS_INIT_SP_ADDR 0x00800000
-#define CONFIG_SYS_LOAD_ADDR 0x00C00800
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00500000\0" \
"pxefile_addr_r=0x00600000\0" \
- "fdt_addr_r=0x01f00000\0" \
+ "fdt_addr_r=0x02800000\0" \
"kernel_addr_r=0x00680000\0" \
"ramdisk_addr_r=0x04000000\0"