+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_RK3288_COMMON_H
#include "rockchip-common.h"
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
-#define CONFIG_SYS_TEXT_BASE 0x00000000
-#else
-#define CONFIG_SYS_TEXT_BASE 0x00100000
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
# define CONFIG_SPL_TEXT_BASE 0xff704000
#endif
-/* MMC/SD IP block */
-#define CONFIG_BOUNCE_BUFFER
-
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_NR_DRAM_BANKS 1
#define SDRAM_BANK_SIZE (2UL << 30)
#define SDRAM_MAX_SIZE 0xfe000000
#define CONFIG_SPI_FLASH
-#define CONFIG_SPI
#define CONFIG_SF_DEFAULT_SPEED 20000000
#ifndef CONFIG_SPL_BUILD
/* usb otg */
/* usb mass storage */
-#define CONFIG_USB_FUNCTION_MASS_STORAGE
#define CONFIG_CMD_USB_MASS_STORAGE
/* usb host support */
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x0fffffff\0" \
"initrd_high=0x0fffffff\0" \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \