#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_CPU_SH7751 1
#define __LITTLE_ENDIAN__ 1
/* SCIF */
* NOR Flash ( Spantion S29GL256P )
*/
#define CONFIG_SYS_FLASH_BASE (0xA0000000)
-#define CONFIG_SYS_MAX_FLASH_BANKS (1)
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/*
* SuperH Clock setting
*/
-#define CONFIG_SYS_CLK_FREQ 60000000
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
/*
#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
-#define CONFIG_IDE_SWAP_IO
/*
* SuperH PCI Bridge Configration