#ifndef __CONFIG_H
#define __CONFIG_H
-#undef DEBUG
-
#define CONFIG_CPU_SH7751 1
#define CONFIG_CPU_SH_TYPE_R 1
#define CONFIG_R2DPLUS 1
#define __LITTLE_ENDIAN__ 1
+#define CONFIG_DISPLAY_BOARDINFO
+
/*
* Command line configuration.
*/
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_FLASH
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_EXT2
-#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_SH_ZIMAGEBOOT
/* SCIF */
#define CONFIG_SCIF_CONSOLE 1
-#define CONFIG_BAUDRATE 115200
#define CONFIG_CONS_SCIF1 1
-#define CONFIG_BOARD_LATE_INIT
-#define CONFIG_BOOTDELAY -1
#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
-#define CONFIG_SYS_SDRAM_SIZE (0x04000000)
+#define CONFIG_SYS_SDRAM_BASE 0x8C000000
+#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
+#define CONFIG_SYS_TEXT_BASE 0x8FE00000
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
/*
* SuperH PCI Bridge Configration
*/
-#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7751_PCI
-#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1
-#define __io
#define __mem_pci
#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
-#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
-#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
+#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
-/*
- * Network device (RTL8139) support
- */
-#define CONFIG_RTL8139
-
#endif /* __CONFIG_H */