Merge branch 'master' of git://git.denx.de/u-boot-arm

[platform/kernel/u-boot.git] / include / configs / qong.h

diff --git a/include/configs/qong.h b/include/configs/qong.h
index 426d90d..c61a9b3 100644 (file)
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -22,9 +22,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/mx31-regs.h>
+#include <asm/arch/imx-regs.h>
 
- /* High Level Configuration Options */
+/* High Level Configuration Options */
 #define CONFIG_ARM1136         1       /* This is an arm1136 CPU core */
 #define CONFIG_MX31            1       /* in a mx31 */
 #define CONFIG_QONG            1
@@ -34,6 +34,8 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
+#define CONFIG_SYS_TEXT_BASE 0xa0000000
+
 #define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS       1
 #define CONFIG_INITRD_TAG              1
@@ -42,8 +44,6 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 1024 * 1024)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 
 /*
  * Hardware drivers
@@ -53,17 +53,21 @@
 #define CONFIG_SYS_MX31_UART1  1
 
 #define CONFIG_MXC_GPIO
+#define CONFIG_HW_WATCHDOG
 
 #define CONFIG_MXC_SPI
 #define CONFIG_DEFAULT_SPI_BUS 1
 #define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_0 | SPI_CS_HIGH)
 #define CONFIG_RTC_MC13783
 
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
 #define CONFIG_FSL_PMIC_BUS    1
 #define CONFIG_FSL_PMIC_CS     0
 #define CONFIG_FSL_PMIC_CLK    100000
 #define CONFIG_FSL_PMIC_MODE   (SPI_MODE_0 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC_BITLEN 32
 
 /* FPGA */
 #define CONFIG_FPGA
@@ -76,18 +80,18 @@
 /* Ethernet */
 #define CONFIG_DNET            1
 #define CONFIG_DNET_BASE       (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
-#define CONFIG_NET_MULTI       1
 
 /* Framebuffer and LCD */
-#define CONFIG_LCD
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
 #define CONFIG_VIDEO_MX3
-#define        CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define LCD_BPP                LCD_COLOR16
-#define        CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
-#define CONFIG_DISPLAY_COM57H5M10XRC
 
 /* USB */
 #define CONFIG_CMD_USB
@@ -134,7 +138,7 @@
 #define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_SPI
 
-#define BOARD_LATE_INIT
+#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_BOOTDELAY       5
 
@@ -177,6 +181,9 @@
                " +${filesize};cp.b ${fileaddr} "                       \
                xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"          \
        "upd=run load update\0"                                         \
+       "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000,"  \
+               "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296,"   \
+               "vmode:0\0"                                             \
 
 /*
  * Miscellaneous configurable options
@@ -300,8 +307,8 @@ extern int qong_nand_rdy(void *chip);
 /* additions for new relocation code, must be added to all boards */
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_END                IRAM_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE               IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 
 #define CONFIG_BOARD_EARLY_INIT_F      1