* Hardware drivers
*/
-#define CONFIG_MX31_UART 1
+#define CONFIG_MXC_UART 1
#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MX31_GPIO
+
/* FPGA */
#define CONFIG_QONG_FPGA 1
#define CONFIG_FPGA_BASE (CS1_BASE)
#define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
#define CONFIG_NET_MULTI 1
+/* Framebuffer and LCD */
+#define CONFIG_LCD
+#define CONFIG_VIDEO_MX3
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_DISPLAY_VBEST_VGG322403
+
/*
* Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
* initial TFTP transfer, should the user wish one, significantly.
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NAND
/*
* You can compile in a MAC address and your custom net settings by using
":${hostname}:${netdev}:off panic=1\0" \
"addtty=setenv bootargs ${bootargs}" \
" console=ttymxc0,${baudrate}\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
"addmisc=setenv bootargs ${bootargs}\0" \
"uboot_addr=a0000000\0" \
"kernel_addr=a0080000\0" \
"ramdisk_addr=a0300000\0" \
- "uboot=qong/u-boot.bin\0" \
+ "u-boot=qong/u-boot.bin\0" \
"kernel_addr_r=80800000\0" \
"hostname=qong\0" \
"bootfile=qong/uImage\0" \
"rootpath=/opt/eldk-4.2-arm/armVFP\0" \
- "flash_self=run ramargs addip addtty addmisc;" \
+ "flash_self=run ramargs addip addtty addmtd addmisc;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "flash_nfs=run nfsargs addip addtty addmisc;" \
+ "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
"bootm ${kernel_addr}\0" \
"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
- "run nfsargs addip addtty addmisc;" \
+ "run nfsargs addip addtty addmtd addmisc;" \
"bootm\0" \
- "load=tftp ${loadaddr} ${uboot}\0" \
+ "bootcmd=run flash_self\0" \
+ "load=tftp ${loadaddr} ${u-boot}\0" \
"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
" +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
" +${filesize};cp.b ${fileaddr} " \
- xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
- "setenv filesize;saveenv\0" \
+ xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
"upd=run load update\0" \
/*
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define PHYS_SDRAM_1 CSD0_BASE
#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
+/*
+ * NAND driver
+ */
+
+#ifndef __ASSEMBLY__
+extern void qong_nand_plat_init(void *chip);
+extern int qong_nand_rdy(void *chip);
+#endif
+#define CONFIG_NAND_PLAT
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE CS3_BASE
+#define NAND_PLAT_INIT() qong_nand_plat_init(nand)
+
+#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
+#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
+#define QONG_NAND_WRITE(addr, cmd) \
+ do { \
+ __REG8(addr) = cmd; \
+ } while (0)
+
+#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
+#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
+#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
+
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
/*
* JFFS2 partitions
*/
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
+#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT \
+ "mtdparts=physmap-flash.0:256k(U-Boot),128k(env1)," \
+ "128k(env2),2560k(kernel),13m(ramdisk),-(user)"
#endif /* __CONFIG_H */