Merge branch 'master' of git://git.denx.de/u-boot-arm

[platform/kernel/u-boot.git] / include / configs / pxa255_idp.h

diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 7485f72..c1c7f80 100644 (file)
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -42,7 +42,7 @@
  * so we MUST NOT initialize critical regs like mem-timing ...
  */
 #undef CONFIG_SKIP_LOWLEVEL_INIT                       /* define for developing */
-#undef CONFIG_SKIP_RELOCATE_UBOOT                      /* define for developing */
+#define        CONFIG_SYS_TEXT_BASE    0x0
 
 /*
  * define the following to enable debug blinks.  A debug blink function
@@ -75,7 +75,6 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN      (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 /*
  * PXA250 IDP memory map information
@@ -87,7 +86,8 @@
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE   (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300)
 #define CONFIG_SMC_USE_32_BIT  1
 /* #define CONFIG_SMC_USE_IOFUNCS */
@@ -100,6 +100,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART         1       /* we use FFUART on LUBBOCK */
 
 /* allow to overwrite serial and ethaddr */
@@ -269,7 +270,7 @@
 /*
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS   4          /* we have 1 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS   1          /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1           0xa0000000 /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE      0x04000000 /* 64 MB */
 #define PHYS_SDRAM_2           0xa4000000 /* SDRAM Bank #2 */
@@ -290,6 +291,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */
@@ -312,6 +316,9 @@
 
 #define CONFIG_SYS_PSSR_VAL            0x20
 
+#define        CONFIG_SYS_CCCR                 CCCR_L27|CCCR_M2|CCCR_N10
+#define        CONFIG_SYS_CKEN                 0x0
+
 /*
  * Memory settings
  */
@@ -321,6 +328,8 @@
 #define CONFIG_SYS_MDCNFG_VAL          0x090009C9
 #define CONFIG_SYS_MDREFR_VAL          0x0085C017
 #define CONFIG_SYS_MDMRS_VAL           0x00220022
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
 
 /*
  * PCMCIA and CF Interfaces