*/
#include <asm/hardware.h>
-
#define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45"
-#define MACH_TYPE_PM9G45 2672
#define CONFIG_MACH_TYPE MACH_TYPE_PM9G45
/* ARM asynchronous clock */
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
/*
* Hardware drivers
#define CONFIG_RED_LED GPIO_PIN_PD(31) /* this is the user1 led */
#define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */
-#define CONFIG_BOOTDELAY 3
/*
* BOOTP options
/*
* Command line configuration.
*/
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_PING 1
-#define CONFIG_CMD_DHCP 1
#define CONFIG_CMD_NAND 1
-#define CONFIG_CMD_USB 1
-#define CONFIG_CMD_JFFS2 1
#define CONFIG_JFFS2_CMDLINE 1
#define CONFIG_JFFS2_NAND 1
#define CONFIG_JFFS2_DEV "nand0" /* NAND dev jffs2 lives on */
#define PHYS_SDRAM 0x70000000
#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
-/* NOR flash, not available */
-#define CONFIG_SYS_NO_FLASH 1
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW 1
-#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* _UHP_OHCI_BASE */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_USB_STORAGE 1
/* board specific(not enough SRAM) */
#define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000
"2M(linux)ro,-(root) rw " \
"rootfstype=jffs2"
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \