Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[platform/kernel/u-boot.git] / include / configs / pfla02.h

diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index be90ce9..e2aae19 100644 (file)
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -1,17 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) Stefano Babic <sbabic@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 
 #ifndef __PCM058_CONFIG_H
 #define __PCM058_CONFIG_H
 
-#include <config_distro_defaults.h>
-
 #ifdef CONFIG_SPL
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     (64 * 1024)
 #include "imx6_spl.h"
 #endif
@@ -27,21 +23,18 @@
 #define CONSOLE_DEV            "ttymxc3"
 
 /* Early setup */
-#define CONFIG_DISPLAY_BOARDINFO_LATE
 
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (8 * SZ_1M)
 
 /* Ethernet */
-#define CONFIG_MII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         3
 
 /* SPI Flash */
-#define CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_BUS          2
 #define CONFIG_SF_DEFAULT_CS           0
 #define CONFIG_SF_DEFAULT_SPEED                20000000
@@ -57,7 +50,6 @@
 #define CONFIG_CMD_NAND
 /* Enable NAND support */
 #define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
@@ -65,21 +57,12 @@
 #endif
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Filesystem support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT    "nand0=gpmi-nand"
-#define MTDPARTS_DEFAULT  "mtdparts=gpmi-nand:-(nand);" \
-       "spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)"
 
 /* Various command support */
 
 /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS           1
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM