+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) Stefano Babic <sbabic@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __PCM058_CONFIG_H
#define __PCM058_CONFIG_H
-#include <config_distro_defaults.h>
-
#ifdef CONFIG_SPL
-#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
#endif
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
/* Early setup */
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_LATE_INIT
-#define CONFIG_DISPLAY_BOARDINFO_LATE
/* Size of malloc() pool */
/* Ethernet */
#define CONFIG_FEC_MXC
-#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 3
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
/* SPI Flash */
-#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SYS_I2C_SPEED 100000
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_NAND
/* Enable NAND support */
-#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
#endif
/* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
/* Filesystem support */
-#define CONFIG_LZO
-#define CONFIG_CMD_UBIFS
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT "nand0=nand"
-#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
-
-/* Various command support */
-#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
-#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
-#define CONFIG_CMD_GSC
-#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
-#define CONFIG_RBTREE
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_FSL_USDHC_NUM 1
/* Environment organization */
-#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_ENV_OFFSET (1024 * SZ_1K)
#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)