Convert CONFIG_CMD_IRQ to Kconfig

[platform/kernel/u-boot.git] / include / configs / p1_twr.h

diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 1e49ee6..fd644f2 100644 (file)
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -10,10 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define        CONFIG_DISPLAY_BOARDINFO
 #if defined(CONFIG_TWR_P1025)
 #define CONFIG_BOARDNAME "TWR-P1025"
-#define CONFIG_P1025
 #define CONFIG_PHY_ATHEROS
 #define CONFIG_QE
 #define CONFIG_SYS_LBC_LBCR    0x00080000      /* Conversion of LBC addr */
@@ -40,22 +38,15 @@
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #endif
 
-/* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500
-
 #define CONFIG_MP
 
-#define CONFIG_FSL_ELBC
-#define CONFIG_PCI
-#define CONFIG_PCIE1   /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2   /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1   /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2   /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 
-#define CONFIG_FSL_LAW
 #define CONFIG_TSEC_ENET       /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
@@ -79,8 +70,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_L2_CACHE
 #define CONFIG_BTB
 
-#define CONFIG_BOARD_EARLY_INIT_F      /* Call board_pre_init */
-
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x1fffffff
 #define CONFIG_PANIC_HANG      /* do not reset board on panic */
@@ -89,7 +78,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
@@ -98,7 +86,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 /* Default settings for DDR3 */
@@ -225,12 +212,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_COM1        (CONFIG_SYS_CCSRBAR+0x4500)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_CCSRBAR+0x4600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#endif
-
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL                     /* Use FSL common I2C driver */
@@ -249,7 +230,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_I2C_PCA9555_ADDR    0x23
 
 /* enable read and write access to EEPROM */
-#define CONFIG_CMD_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
@@ -287,11 +267,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE1_IO_PHYS       0xffc00000
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
 
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
 #define CONFIG_CMD_PCI
 
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_TSEC_ENET)
@@ -406,10 +384,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
 #define CONFIG_CMD_REGINFO
 
 /*
@@ -418,30 +392,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_HAS_FSL_DR_USB
 
 #if defined(CONFIG_HAS_FSL_DR_USB)
-#define CONFIG_USB_EHCI
-
-#ifdef CONFIG_USB_EHCI
-#define CONFIG_CMD_USB
+#ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_FSL
-#define CONFIG_USB_STORAGE
 #endif
 #endif
 
-#define CONFIG_MMC
-
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
-#define CONFIG_CMD_MMC
-#define CONFIG_GENERIC_MMC
-#endif
-
-#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) \
-                || defined(CONFIG_FSL_SATA)
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
 #endif
 
 #undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -481,11 +440,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR        1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #define CONFIG_BOOTARGS        /* the boot command will set bootargs */
 
-#define CONFIG_BAUDRATE        115200
-
 #define        CONFIG_EXTRA_ENV_SETTINGS       \
 "netdev=eth0\0"        \
 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"    \
@@ -527,7 +483,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 "consoledev=ttyS0\0"   \
 "ramdiskaddr=2000000\0"        \
 "ramdiskfile=rootfs.ext2.gz.uboot\0"   \
-"fdtaddr=c00000\0"     \
+"fdtaddr=1e00000\0"    \
 "bdev=sda1\0"  \
 "norbootaddr=ef080000\0"       \
 "norfdtaddr=ef040000\0"        \