#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#elif defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000
-#else
-#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
#endif /* not CONFIG_TPL_BUILD */
#endif
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
-#define CONFIG_LBA48
-
#define CONFIG_HWCONFIG
/*
* These can be toggled for performance analysis, otherwise use default.
/*
* USB
*/
-#define CONFIG_HAS_FSL_DR_USB
-
-#if defined(CONFIG_HAS_FSL_DR_USB)
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#endif
-#endif
-
-#if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#endif
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR