Merge tag 'video-20221030' of https://source.denx.de/u-boot/custodians/u-boot-video

[platform/kernel/u-boot.git] / include / configs / p1_p2_rdb_pc.h

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ba04029..d201c72 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -24,6 +24,9 @@
 #define __SW_NOR_BANK_MASK     0xfd
 #define __SW_NOR_BANK_UP       0x00
 #define __SW_NOR_BANK_LO       0x02
+#define __SW_BOOT_NOR_BANK_UP  0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO  0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK        0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE     (256 << 10)
 #endif
 
@@ -52,6 +55,9 @@
 #define __SW_NOR_BANK_MASK     0xfd
 #define __SW_NOR_BANK_UP       0x00
 #define __SW_NOR_BANK_LO       0x02
+#define __SW_BOOT_NOR_BANK_UP  0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO  0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK        0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE     (256 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -70,6 +76,9 @@
 #define __SW_NOR_BANK_MASK     0xfd
 #define __SW_NOR_BANK_UP       0x00
 #define __SW_NOR_BANK_LO       0x02
+#define __SW_BOOT_NOR_BANK_UP  0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO  0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK        0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE     (512 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -80,7 +89,11 @@
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MMC_U_BOOT_START    CONFIG_SYS_TEXT_BASE
+#ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR
+#define CONFIG_SYS_MMC_U_BOOT_OFFS     (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512)
+#else
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     CONFIG_SPL_PAD_TO
+#endif
 #elif defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                CONFIG_SYS_TEXT_BASE
@@ -176,10 +189,8 @@
  * Local Bus Definitions
  */
 #if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SYS_MAX_FLASH_SECT      512     /* 64M */
 #define CONFIG_SYS_FLASH_BASE          0xec000000
 #else
-#define CONFIG_SYS_MAX_FLASH_SECT      128     /* 16M */
 #define CONFIG_SYS_FLASH_BASE          0xef000000
 #endif
 
@@ -195,15 +206,8 @@
 #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
 /* Nand Flash */
 #ifdef CONFIG_NAND_FSL_ELBC
 #define CONFIG_SYS_NAND_BASE           0xff800000
@@ -474,10 +478,14 @@ __VSCFW_ADDR      \
 MAP_NOR_LO_CMD(map_lowernorbank) \
 MAP_NOR_UP_CMD(map_uppernorbank) \
 RST_NOR_CMD(norboot) \
+RST_NOR_LO_CMD(norlowerboot) \
+RST_NOR_UP_CMD(norupperboot) \
 RST_SPI_CMD(spiboot) \
 RST_SD_CMD(sdboot) \
+RST_SD2_CMD(sd2boot) \
 RST_NAND_CMD(nandboot) \
 RST_PCIE_CMD(pciboot) \
+RST_DEF_CMD(defboot) \
 ""
 
 #define CONFIG_USB_FAT_BOOT    \