Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video...

[platform/kernel/u-boot.git] / include / configs / p1_p2_rdb_pc.h

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 33f052d..64a5269 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -102,12 +102,10 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE            (128 << 10)
-#define CONFIG_TPL_TEXT_BASE           0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START   (0x11000000)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    ((128 + 128) << 10)
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
@@ -116,7 +114,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xf8f80000
 #define CONFIG_SYS_NAND_U_BOOT_START   0xf8f80000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    (128 << 10)
 #endif /* not CONFIG_TPL_BUILD */
 
 #define CONFIG_SPL_PAD_TO              0x20000
@@ -130,7 +127,7 @@
 
 #ifndef CONFIG_SYS_MONITOR_BASE
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        0xf8f81000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
 #else
@@ -141,21 +138,13 @@
 #define CONFIG_PCIE1   /* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2   /* PCIE controller 2 (slot 2) */
 
-#define CONFIG_SYS_SATA_MAX_DEVICE     2
 #define CONFIG_LBA48
 
-#if defined(CONFIG_TARGET_P2020RDB)
-#define CONFIG_SYS_CLK_FREQ    100000000
-#else
-#define CONFIG_SYS_CLK_FREQ    66666666
-#endif
-
 #define CONFIG_HWCONFIG
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
 #define CONFIG_L2_CACHE
-#define CONFIG_BTB
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
@@ -175,10 +164,8 @@
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_2G
-#define CONFIG_CHIP_SELECTS_PER_CTRL   2
 #else
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_1G
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #endif
 #define CONFIG_SYS_SDRAM_SIZE          (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
@@ -263,8 +250,6 @@
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
-
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
@@ -500,12 +485,6 @@
 #define TSEC1_PHYIDX   0
 #define TSEC2_PHYIDX   0
 #define TSEC3_PHYIDX   0
-
-#define CONFIG_ETHPRIME        "eTSEC1"
-
-#define CONFIG_HAS_ETH0
-#define CONFIG_HAS_ETH1
-#define CONFIG_HAS_ETH2
 #endif /* CONFIG_TSEC_ENET */
 
 /*
@@ -561,7 +540,6 @@
  */
 #define CONFIG_HOSTNAME                "unknown"
 #define CONFIG_ROOTPATH                "/opt/nfsroot"
-#define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       u-boot.bin /* U-Boot image on TFTP server */
 
 #ifdef __SW_BOOT_NOR