#include <configs/exynos4-common.h>
-/* High Level Configuration Options */
-#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
-#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
-
/* ORIGEN has 4 bank of DRAM */
-#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define CFG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
-
-#define CONFIG_SYS_MONITOR_BASE 0x00000000
-
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR 0x02020030
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"loadaddr=0x40007000\0" \
"rdaddr=0x48000000\0" \
"kerneladdr=0x40007000\0" \
"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
"source ${loadaddr}\0"
-#define CONFIG_CLK_1000_400_200
-
-/* MIU (Memory Interleaving Unit) */
-#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
-
-#define RESERVE_BLOCK_SIZE (512)
-#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
-
-#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
-
-#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
-
-/* U-Boot copy size from boot Media to DRAM.*/
-#define COPY_BL2_SIZE 0x80000
-#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
-#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
-
#endif /* __CONFIG_H */