Merge git://git.denx.de/u-boot-socfpga

[platform/kernel/u-boot.git] / include / configs / omapl138_lcdk.h

diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 879c8a0..da615e5 100644 (file)
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -13,10 +13,8 @@
 /*
  * Board
  */
-#define CONFIG_DRIVER_TI_EMAC
 #undef CONFIG_USE_SPIFLASH
 #undef CONFIG_SYS_USE_NOR
-#define        CONFIG_USE_NAND
 
 /*
 * Disable DM_* for SPL build and can be re-enabled after adding
@@ -45,14 +43,15 @@
 #define PHYS_SDRAM_1_SIZE      (128 << 20) /* SDRAM size 128MB */
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
 
+#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
+
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + 0x2000000)
 
 /* memtest will be run on 16MB */
 #define CONFIG_SYS_MEMTEST_END         (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
 
-#define CONFIG_NR_DRAM_BANKS   1 /* we have 1 bank of DRAM */
-
 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (      \
        DAVINCI_SYSCFG_SUSPSRC_TIMER0 |         \
        DAVINCI_SYSCFG_SUSPSRC_SPI1 |           \
@@ -123,8 +122,6 @@
 
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
 
 #ifdef CONFIG_USE_SPIFLASH
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x8000
@@ -134,7 +131,6 @@
 /*
  * I2C Configuration
  */
-#define CONFIG_SYS_I2C_DAVINCI
 #define CONFIG_SYS_DAVINCI_I2C_SPEED   25000
 #define CONFIG_SYS_DAVINCI_I2C_SLAVE   10 /* Bogus, master-only in U-Boot */
 #define CONFIG_SYS_I2C_EXPANDER_ADDR   0x20
@@ -142,8 +138,7 @@
 /*
  * Flash & Environment
  */
-#ifdef CONFIG_USE_NAND
-#define CONFIG_NAND_DAVINCI
+#ifdef CONFIG_NAND
 #define CONFIG_ENV_OFFSET              0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE                        (128 << 9)
 #define        CONFIG_SYS_NAND_USE_FLASH_BBT
@@ -184,9 +179,6 @@
 #endif
 
 #ifdef CONFIG_SYS_USE_NOR
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_MAX_FLASH_BANKS     1 /* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ       (128 << 10) /* 128KB */
 #define CONFIG_ENV_OFFSET              (CONFIG_SYS_FLASH_SECT_SZ * 3)
@@ -208,7 +200,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_MII
 #undef CONFIG_DRIVER_TI_EMAC_USE_RMII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS2
@@ -219,7 +210,6 @@
 /*
  * U-Boot general configuration
  */
-#define CONFIG_MISC_INIT_R
 #define CONFIG_BOOTFILE                "zImage" /* Boot file name */
 #define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
@@ -259,12 +249,7 @@
 #define CONFIG_CLOCKS
 #endif
 
-#ifdef CONFIG_USE_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
-
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_NAND) && \
        !defined(CONFIG_SYS_USE_NOR) && \
        !defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_SIZE                (16 << 10)
@@ -285,7 +270,6 @@
                                                CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE     CONFIG_SYS_MALLOC_LEN
 #define CONFIG_SPL_STACK       0x8001ff00
-#define CONFIG_SPL_TEXT_BASE   0x80000000
 #define CONFIG_SPL_MAX_FOOTPRINT       32768
 #define CONFIG_SPL_PAD_TO      32768
 #endif