*
* Configuation settings for the TI OMAP Perseus 2 board.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define CONFIG_SYS_CLK_FREQ 13000000
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
-#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96
#define CONFIG_LAN91C96_BASE 0x04000300
#define CONFIG_LAN91C96_EXT_PHY
* NS16550 Configuration
*/
-#define CFG_NS16550
-#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE (1)
-#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
-#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (1)
+#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
+#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
* on perseus */
/*
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
/*
* Command line configuration.
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
-#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
-#define CFG_LOAD_ADDR 0x10000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The OMAP730 has 3 general purpose MPU timers, they can be driven by
* the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
* local divisor.
*/
-
-#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
+#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Physical Memory Map
#error Unknown Boot Chip-Select number
#endif
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#define PHYS_SRAM 0x20000000
+
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
-#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
/* addr of environment */
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
-#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
#endif /* ! __CONFIG_H */