#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/sizes.h>
/*
* High Level Configuration Options
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
+/*
+ * Display CPU and Board information
+ */
+#define CONFIG_DISPLAY_CPUINFO 1
+#define CONFIG_DISPLAY_BOARDINFO 1
+
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
/*
* Size of malloc() pool
*/
-#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
/* Sector */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
/* initial data */
/*
/*
* NS16550 Configuration
+ * Zoom2 uses the TL16CP754C on the debug board
+ */
+#define CONFIG_SERIAL_MULTI 1
+/*
+ * 0 - 1 : first USB with respect to the left edge of the debug board
+ * 2 - 3 : second USB with respect to the left edge of the debug board
*/
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
+#define ZOOM2_DEFAULT_SERIAL_DEVICE (&zoom2_serial_device0)
+
+#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */
#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_REG_SIZE (-2)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3 /* UART3 */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {115200}
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
+
#define CONFIG_MMC 1
#define CONFIG_OMAP3_MMC 1
#define CONFIG_DOS_PARTITION 1
+/* DDR - I use Micron DDR */
+#define CONFIG_OMAP3_MICRON_DDR 1
+
+/* Status LED */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED 1
+#define STATUS_LED_BLUE 0
+#define STATUS_LED_RED 1
+/* Blue */
+#define STATUS_LED_BIT STATUS_LED_BLUE
+#define STATUS_LED_STATE STATUS_LED_ON
+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
+/* Red */
+#define STATUS_LED_BIT1 STATUS_LED_RED
+#define STATUS_LED_STATE1 STATUS_LED_OFF
+#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
+/* Optional value */
+#define STATUS_LED_BOOT STATUS_LED_BIT
+
+/* GPIO banks */
+#ifdef CONFIG_STATUS_LED
+#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
+#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
+#endif
+#define CONFIG_OMAP3_GPIO_3 /* board revision */
+#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
+
/* commands to include */
#include <config_cmd_default.h>
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_DRIVER_OMAP34XX_I2C 1
/*
+ * TWL4030
+ */
+#define CONFIG_TWL4030_POWER 1
+#define CONFIG_TWL4030_LED 1
+
+/*
* Board NAND Info.
*/
#define CONFIG_NAND_OMAP_GPMC
*
* The stack sizes are set up in start.S using these settings
*/
-#define CONFIG_STACKSIZE SZ_128K
+#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ SZ_4K
-#define CONFIG_STACKSIZE_FIQ SZ_4K
+#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
#endif
/*-----------------------------------------------------------------------
*/
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/* SDRAM Bank Allocation method */
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
/* one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
-#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#define CONFIG_SYS_FLASH_BASE boot_flash_base
#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
#ifndef __ASSEMBLY__
-extern gpmc_csx_t *nand_cs_base;
-extern gpmc_t *gpmc_cfg_base;
+extern struct gpmc *gpmc_cfg;
extern unsigned int boot_flash_base;
extern volatile unsigned int boot_flash_env_addr;
extern unsigned int boot_flash_off;