*
* Configuration settings for the OMAP3 Pandora.
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
* High Level Configuration Options
*/
#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C 1
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
+#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand */
/* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
-
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/* **** PISMO SUPPORT *** */
-
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE GPMC_SIZE_128M
-#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
-
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#if defined(CONFIG_CMD_NAND)
-#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
+#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
/* Monitor at start of flash */