Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[platform/kernel/u-boot.git] / include / configs / omap3_pandora.h

diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 8a8a5d1..11d7b86 100644 (file)
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -4,20 +4,7 @@
  *
  * Configuration settings for the OMAP3 Pandora.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -27,14 +14,18 @@
  * High Level Configuration Options
  */
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
-#define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3_PANDORA   1       /* working with pandora */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
+/* Common ARM Erratas */
+#define CONFIG_ARM_ERRATA_454179
+#define CONFIG_ARM_ERRATA_430973
+#define CONFIG_ARM_ERRATA_621766
 
 #define CONFIG_SDRC    /* The chip has SDRC controller */
 
 #include <asm/arch/cpu.h>      /* get chip and board defs */
-#include <asm/arch/omap3.h>
+#include <asm/arch/omap.h>
 
 /*
  * Display CPU and Board information
@@ -123,12 +114,10 @@
 #undef CONFIG_CMD_NFS          /* NFS support                  */
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C                        1
-#define CONFIG_SYS_I2C_SPEED           100000
-#define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
-#define CONFIG_DRIVER_OMAP34XX_I2C     1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED    100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE    1
+#define CONFIG_SYS_I2C_OMAP34XX
 
 /*
  * TWL4030
@@ -145,8 +134,6 @@
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand */
                                                        /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND */
                                                /* devices */
 
@@ -182,7 +169,8 @@
                        "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
                "source ${loadaddr}; " \
        "fi; " \
-       "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
+       "ubi part boot && ubifsmount ubi:boot && " \
+               "ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
 
 #define CONFIG_AUTO_COMPLETE   1
 /*
@@ -214,14 +202,12 @@
  */
 #define CONFIG_SYS_TIMERBASE           OMAP34XX_GPT2
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS   2       /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1           OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
 #define CONFIG_SYS_TEXT_BASE           0x80008000
@@ -237,15 +223,10 @@
  */
 
 /* **** PISMO SUPPORT *** */
-
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE               GPMC_SIZE_128M
-#define PISMO1_ONEN_SIZE               GPMC_SIZE_128M
-
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
 #if defined(CONFIG_CMD_NAND)
-#define CONFIG_SYS_FLASH_BASE          PISMO1_NAND_BASE
+#define CONFIG_SYS_FLASH_BASE          NAND_BASE
 #endif
 
 /* Monitor at start of flash */