/* TWL4030 LED */
#define CONFIG_TWL4030_LED
+/* USB EHCI */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
/* Initialize GPIOs by default */
#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
#define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
/* commands to include */
#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_USB
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_NFS /* NFS support */
/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
- "fdtfile=overo.dtb\0" \
"bootdir=/boot\0" \
"bootfile=zImage\0" \
"usbtty=cdc_acm\0" \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
- "nand read ${loadaddr} linux; " \
- "bootm ${loadaddr}\0" \
+ "if nand read ${loadaddr} linux; then " \
+ "bootm ${loadaddr};" \
+ "fi;\0" \
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"run mmcboot;" \
"fi;" \
"if run loadzimage; then " \
- "if test -n $fdtfile; then " \
- "if run loadfdt; then " \
- "run mmcbootfdt;" \
- "fi;" \
+ "if test -z \"${fdtfile}\"; then " \
+ "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
+ "fi;" \
+ "if run loadfdt; then " \
+ "run mmcbootfdt;" \
"fi;" \
"fi;" \
"fi;" \
0x01F00000) /* 31MB */
/* FLASH and environment organization */
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE GPMC_SIZE_128M
-#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
-
#if defined(CONFIG_NAND)
-#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
+#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
/* Monitor at start of flash */
#define CONFIG_SYS_CACHELINE_SIZE 64
/* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS 0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
#endif /* __CONFIG_H */