Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

[platform/kernel/u-boot.git] / include / configs / omap1510inn.h

diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h
index c7d1b6c..9ff4f84 100644 (file)
--- a/include/configs/omap1510inn.h
+++ b/include/configs/omap1510inn.h
@@ -50,7 +50,6 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
@@ -60,7 +59,8 @@
 #define CONFIG_SMC9196_BASE 0x08000300
 #define CONFIG_SMC9196_EXT_PHY
 */
-#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_NET_MULTI
+#define CONFIG_LAN91C96
 #define CONFIG_LAN91C96_BASE 0x08000300
 #define CONFIG_LAN91C96_EXT_PHY
 
@@ -130,16 +130,14 @@
 #define CONFIG_SYS_MEMTEST_START       0x10000000      /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x12000000      /* 32 MB in DRAM        */
 
-#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           0x10000000      /* default load address */
 
-/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
+/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE   0xFFFEC500          /* use timer 1 */
-#define CONFIG_SYS_PVT         7                   /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ                  ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE   OMAP1510_TIMER1_BASE    /* use timer 1 */
+#define CONFIG_SYS_PTV         2       /* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ          1000
 
 /*-----------------------------------------------------------------------
  * Stack sizes