Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[platform/kernel/u-boot.git] / include / configs / mx7ulp_evk.h

diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index ab7b30b..c1b379b 100644 (file)
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
  *
  * Configuration settings for the Freescale i.MX7ULP EVK board.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __MX7ULP_EVK_CONFIG_H
@@ -12,42 +11,17 @@
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
 
-/*Uncomment it to use secure boot*/
-/*#define CONFIG_SECURE_BOOT*/
-
-#ifdef CONFIG_SECURE_BOOT
-#ifndef CONFIG_CSF_SIZE
-#define CONFIG_CSF_SIZE                        0x4000
-#endif
-#endif
-
 #define CONFIG_BOARD_POSTCLK_INIT
 #define CONFIG_SYS_BOOTM_LEN           0x1000000
 
-#define SRC_BASE_ADDR                  CMC1_RBASE
-#define IRAM_BASE_ADDR                 OCRAM_0_BASE
-#define IOMUXC_BASE_ADDR               IOMUXC1_RBASE
-
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_FSL_ESDHC
-#define CONFIG_FSL_USDHC
-#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-
-#define CONFIG_SYS_FSL_USDHC_NUM        1
-
-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define CONFIG_SYS_MMC_ENV_DEV          0      /* USDHC1 */
 #define CONFIG_SYS_MMC_ENV_PART         0      /* user area */
 #define CONFIG_MMCROOT                  "/dev/mmcblk0p2"  /* USDHC1 */
 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 
-#define CONFIG_ENV_OFFSET              (12 * SZ_64K)
-#define CONFIG_ENV_SIZE                        SZ_8K
-
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
 
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Fixed at 1Mhz from TSTMR */
 
 #define CONFIG_INITRD_TAG
@@ -76,7 +50,6 @@
 #define CONFIG_SYS_MAXARGS             256
 
 /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS           1
 
 #define PHYS_SDRAM                     0x60000000
 #define PHYS_SDRAM_SIZE                        SZ_1G
@@ -173,7 +146,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#ifndef CONFIG_SYS_DCACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 #define CONFIG_CMD_CACHE
 #endif