#define CONFIG_BOARD_POSTCLK_INIT
#define CONFIG_SYS_BOOTM_LEN 0x1000000
-#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
-#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-#define CONFIG_BOARD_EARLY_INIT_F
-
/* UART */
#define LPUART_BASE LPUART4_RBASE
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Miscellaneous configurable options */
#define PHYS_SDRAM_SIZE SZ_1G
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_LOADADDR 0x60800000
+#define CONFIG_SYS_LOAD_ADDR 0x60800000
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"fi"
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-#define CONFIG_CMD_CACHE
-#endif
-
#endif /* __CONFIG_H */