+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6SX Sabreauto board.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_EXTRA_ENV_SETTINGS \
"else run netboot; fi"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START 0x80000000
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
/* Network */
#define CONFIG_FEC_MXC
-#define CONFIG_MII
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHY_ATHEROS
-
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_IMX_THERMAL
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define CONFIG_SF_DEFAULT_BUS 0
-#define CONFIG_SF_DEFAULT_CS 0
-#define CONFIG_SF_DEFAULT_SPEED 40000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-#define FSL_QSPI_FLASH_SIZE SZ_32M
-#define FSL_QSPI_FLASH_NUM 2
-#endif
-
-#define CONFIG_ENV_OFFSET (8 * SZ_64K)
-#define CONFIG_ENV_SIZE SZ_8K
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC3*/
-#endif
#endif /* __CONFIG_H */