#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_FPGA_COUNT 1
-
/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_ESDHC_NUM 2
+#define CFG_SYS_FSL_ESDHC_ADDR 0
/* bootz: zImage/initrd.img support */
#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
#define PHYS_SDRAM_SIZE (gd->ram_size)
-#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
+#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
+#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
/* environment organization */
-/* Framebuffer and LCD */
-#define CONFIG_IMX_VIDEO_SKIP
-
#endif /* __CONFIG_H */