#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/mx31-regs.h>
+#include <asm/arch/imx-regs.h>
/* High Level Configuration Options */
-#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
-#define CONFIG_MX31 1 /* in a mx31 */
+#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
+#define CONFIG_MX31 /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ 26000000
#define CONFIG_MX31_CLK32 32768
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SKIP_LOWLEVEL_INIT
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (2*CONFIG_ENV_SIZE + 2 * 128 * 1024)
-/* Bytes reserved for initial data */
/*
* Hardware drivers
*/
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX31_UART1
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_MXC_GPIO
-#define CONFIG_HARD_SPI 1
-#define CONFIG_MXC_SPI 1
+#define CONFIG_HARD_SPI
+#define CONFIG_MXC_SPI
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
-#define CONFIG_FSL_PMIC
+/* PMIC Controller */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 2
#define CONFIG_FSL_PMIC_CLK 1000000
#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
-#define CONFIG_RTC_MC13783 1
+#define CONFIG_FSL_PMIC_BITLEN 32
+#define CONFIG_RTC_MC13XXX
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SPI
#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
*/
#undef CONFIG_CMD_IMLS
+#define CONFIG_BOARD_LATE_INIT
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_EXTRA_ENV_SETTINGS \
"nand erase 0x0 0x40000; " \
"nand write 0x81000000 0x0 0x40000\0"
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0xB6000000
-#define CONFIG_SMC911X_32_BIT 1
+#define CONFIG_SMC911X_32_BIT
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "uboot> "
+#define CONFIG_SYS_PROMPT "MX31PDK U-Boot > "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
* Stack sizes
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_BASE
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
+#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_GBL_DATA_OFFSET)
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
/* No NOR flash present */
-#define CONFIG_SYS_NO_FLASH 1
+#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x40000
#define CONFIG_ENV_OFFSET_REDUND 0x60000
#define CONFIG_ENV_SIZE (128 * 1024)