#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
#define CONFIG_MX31 1 /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
-#define CONFIG_MX31_CLK32 32000
+#define CONFIG_MX31_CLK32 32768
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
/*
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
-#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
#define CONFIG_MX31_UART 1
#define CFG_MX31_UART1 1
+#define CONFIG_HARD_SPI 1
+#define CONFIG_MXC_SPI 1
+#define CONFIG_DEFAULT_SPI_BUS 1
+#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783 1
+/* MC13783 connected to CSPI2 and SS0 */
+#define CONFIG_MC13783_SPI_BUS 1
+#define CONFIG_MC13783_SPI_CS 0
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
#define CONFIG_BOOTDELAY 3
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.23.168
-#define CONFIG_SERVERIP 192.168.23.2
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
- "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
- "bootcmd=run bootcmd_net\0" \
- "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
- "prg_uboot=tftpboot 0x80000000 u-boot-mx31ads.bin; protect off 0xa0000000 0xa001ffff; erase 0xa0000000 0xa001ffff; cp.b 0x80000000 0xa0000000 $(filesize)\0"
-
+#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "uboot_addr=0xa0000000\0" \
+ "uboot=mx31ads/u-boot.bin\0" \
+ "kernel=mx31ads/uImage\0" \
+ "nfsroot=/opt/eldk/arm\0" \
+ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
+ "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "bootcmd=run bootcmd_net\0" \
+ "bootcmd_net=run bootargs_base bootargs_nfs; " \
+ "tftpboot ${loadaddr} ${kernel}; bootm\0" \
+ "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \
+ "protect off ${uboot_addr} 0xa003ffff; " \
+ "erase ${uboot_addr} 0xa003ffff; " \
+ "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \
+ "setenv filesize; saveenv\0"
#define CONFIG_DRIVER_CS8900 1
#define CS8900_BASE 0xb4020300
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
-#define CFG_LOAD_ADDR CSD0_BASE /* default load address */
+#define CFG_LOAD_ADDR CONFIG_LOADADDR
-#define CFG_HZ 32000
+#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source */
#define CONFIG_CMDLINE_EDITING 1
#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SECT_SIZE (32 * 1024)
-#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SECT_SIZE (32 * 1024)
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
/* Address and size of Redundant Environment Sector */
-#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
-#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
/* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
* The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
* if we put environment next to it, we will have to occupy 128KiB for it.
* Putting it at the top of flash we use only 32KiB. */
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CONFIG_ENV_SECT_SIZE)
/*-----------------------------------------------------------------------
* CFI FLASH driver setup
*/
#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
-#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */