+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the Hitachi Solution Engine 7722
*
* Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MS7722SE_H
#define __MS7722SE_H
#define CONFIG_CPU_SH7722 1
-#define CONFIG_MS7722SE 1
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define MS7722SE_FLASH_BASE_1 (0xA0000000)
#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
-#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
-#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
/* SCIF */
#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-#undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */
#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
#endif /* __MS7722SE_H */