Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
[platform/kernel/u-boot.git] / include / configs / mpc5121ads.h
index f966325..6e6af62 100644 (file)
  */
 #define CONFIG_E300            1       /* E300 Family */
 #define CONFIG_MPC512X         1       /* MPC512X family */
-#define CONFIG_FSL_DIU_FB      1       /* FSL DIU */
 
 #define        CONFIG_SYS_TEXT_BASE    0xFFF00000
 
 /* video */
-#undef CONFIG_VIDEO
-
-#ifdef CONFIG_VIDEO
+#ifdef CONFIG_FSL_DIU_FB
+#define CONFIG_SYS_DIU_ADDR    (CONFIG_SYS_IMMR + 0x2100)
+#define CONFIG_VIDEO
 #define CONFIG_CMD_BMP
 #define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
@@ -74,7 +74,6 @@
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_SYS_IMMR                0x80000000
-#define CONFIG_SYS_DIU_ADDR            (CONFIG_SYS_IMMR+0x2100)
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest region */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 #define CONFIG_SYS_NAND_BASE            0x40000000
 
 #define CONFIG_SYS_MAX_NAND_DEVICE      2
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE  /* driver supports mutipl. chips */
 
 /*
  */
 #define CONFIG_SYS_CPLD_BASE           0x82000000
 #define CONFIG_SYS_CPLD_SIZE           0x00010000      /* 64 KB */
+#define CONFIG_SYS_CS2_START           CONFIG_SYS_CPLD_BASE
+#define CONFIG_SYS_CS2_SIZE            CONFIG_SYS_CPLD_SIZE
 
 #define CONFIG_SYS_SRAM_BASE           0x30000000
 #define CONFIG_SYS_SRAM_SIZE           0x00020000      /* 128 KB */
  * Serial console configuration
  */
 #define CONFIG_PSC_CONSOLE     3       /* console is on PSC3 */
+#define CONFIG_SYS_PSC3
 #if CONFIG_PSC_CONSOLE != 3
 #error CONFIG_PSC_CONSOLE must be 3
 #endif
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
 #ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
 /*
+ * Clocks in use
+ */
+#define SCCR1_CLOCKS_EN        (CLOCK_SCCR1_CFG_EN |                           \
+                        CLOCK_SCCR1_DDR_EN |                           \
+                        CLOCK_SCCR1_FEC_EN |                           \
+                        CLOCK_SCCR1_LPC_EN |                           \
+                        CLOCK_SCCR1_NFC_EN |                           \
+                        CLOCK_SCCR1_PATA_EN |                          \
+                        CLOCK_SCCR1_PCI_EN |                           \
+                        CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |       \
+                        CLOCK_SCCR1_PSCFIFO_EN |                       \
+                        CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_DIU_EN |           \
+                        CLOCK_SCCR2_I2C_EN |           \
+                        CLOCK_SCCR2_MEM_EN |           \
+                        CLOCK_SCCR2_SPDIF_EN |         \
+                        CLOCK_SCCR2_USB1_EN |          \
+                        CLOCK_SCCR2_USB2_EN)
+
+/*
  * PCI
  */
 #ifdef CONFIG_PCI
  * Ethernet configuration
  */
 #define CONFIG_MPC512x_FEC     1
-#define CONFIG_NET_MULTI
 #define CONFIG_PHY_ADDR                0x1
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_FEC_AN_TIMEOUT  1
 #define CONFIG_TIMESTAMP
 
 #define CONFIG_HOSTNAME                mpc5121ads
-#define CONFIG_BOOTFILE                mpc5121ads/uImage
-#define CONFIG_ROOTPATH                /opt/eldk/ppc_6xx
+#define CONFIG_BOOTFILE                "mpc5121ads/uImage"
+#define CONFIG_ROOTPATH                "/opt/eldk/ppc_6xx"
 
 #define CONFIG_LOADADDR                400000  /* default location for tftp and bootm */