Merge tag 'u-boot-at91-2023.07-a' of https://source.denx.de/u-boot/custodians/u-boot...

[platform/kernel/u-boot.git] / include / configs / maxbcm.h

diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index e4df9d8..413597e 100644 (file)
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -19,7 +19,7 @@
  */
 
 /* I2C */
-#define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
+#define CFG_I2C_MVTWSI_BASE0           MVEBU_TWSI_BASE
 
 /* SPI NOR flash default params, used by sf commands */
 
@@ -46,23 +46,7 @@
  * L2 cache thus cannot be used.
  */
 
-/* SPL */
-/* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE            ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000))
-
-#define CONFIG_SPL_BSS_START_ADDR      (0x40000000 + (128 << 10))
-#define CONFIG_SPL_BSS_MAX_SIZE                (16 << 10)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
-
-#define CONFIG_SPL_STACK               (0x40000000 + ((192 - 16) << 10))
-#define CONFIG_SPL_BOOTROM_SAVE                (CONFIG_SPL_STACK + 4)
-
-/* SPL related SPI defines */
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SYS_SDRAM_SIZE          SZ_1G
+#define CFG_SYS_SDRAM_SIZE             SZ_1G
 
 #endif /* _CONFIG_DB_MV7846MP_GP_H */