#ifndef _CONFIG_DB_MV7846MP_GP_H
#define _CONFIG_DB_MV7846MP_GP_H
+#include <linux/sizes.h>
+
/*
* High Level Configuration Options (easy to change)
*/
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* SPI NOR flash default params, used by sf commands */
* L2 cache thus cannot be used.
*/
-/* SPL */
-/* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
-
-#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
-#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
-
-#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
-#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-
-/* SPL related SPI defines */
-
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
-#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
+#define CFG_SYS_SDRAM_SIZE SZ_1G
#endif /* _CONFIG_DB_MV7846MP_GP_H */