#include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_FSL_CLK
-
-#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-
/*
* Memory configurations
*/
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* U-Boot general configurations
*/
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
-#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
- /* Boot argument buffer size */
/*
* Serial Driver
* Ethernet on SOC (FEC)
*/
#ifdef CONFIG_CMD_NET
-#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_DISCOVER_PHY
-#define CONFIG_FEC_XCV_TYPE RMII
-#define CONFIG_ETHPRIME "FEC0"
#endif
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
* SATA
*/
#ifdef CONFIG_CMD_SATA
-#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
#define CONFIG_LBA48
/*
* LCD
*/
-#define CONFIG_VIDEO_LOGO
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
/* LVDS display */
/* Watchdog */
/*
- * Boot Linux
- */
-#define CONFIG_BOOTFILE "boot/fitImage"
-#define CONFIG_BOOTCOMMAND "run mmc_mmc"
-
-/*
* NAND SPL
*/
#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
-#define CONFIG_SPL_PAD_TO 0x8000
-#define CONFIG_SPL_STACK 0x70004000
#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
"fi ; " \
"fi\0"
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_WATCHDOG
-#define CONFIG_HW_WATCHDOG
-#endif
-
#endif /* __M53MENLO_CONFIG_H__ */