i2c: Move PPC4xx I2C driver into drivers/i2c directory
[platform/kernel/u-boot.git] / include / configs / lwmon5.h
index e0dbd61..6461124 100644 (file)
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C                1               /* I2C with hardware support    */
 #undef CONFIG_SOFT_I2C                         /* I2C bit-banged               */
+#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
 #define CONFIG_SYS_I2C_SPEED           100000          /* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 
                "cp.b 200000 FFF80000 80000\0"                          \
        "upd=run load update\0"                                         \
        "lwe_env=tftp 200000 /tftpboot.dev/lwmon5/env_uboot.bin;"       \
-               "autoscr 200000\0"                                      \
+               "source 200000\0"                                       \
        ""
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 
+#define CONFIG_PPC4xx_EMAC
 #define        CONFIG_IBM_EMAC4_V4     1
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                3       /* PHY address, See schematics  */
 /* Video console */
 #define CONFIG_VIDEO
 #define CONFIG_VIDEO_MB862xx
+#define CONFIG_VIDEO_MB862xx_ACCEL
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_CONSOLE_EXTRA_INFO
 #define VIDEO_FB_16BPP_PIXEL_SWAP
+#define VIDEO_FB_16BPP_WORD_SWAP
 
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_VIDEO_SW_CURSOR
 /*-----------------------------------------------------------------------
  * Graphics (Fujitsu Lime)
  *----------------------------------------------------------------------*/
-/* SDRAM Clock frequency adjustment register */
-#define CONFIG_SYS_LIME_SDRAM_CLOCK    0xC1FC0038
 /* Lime Clock frequency is to set 100MHz */
 #define CONFIG_SYS_LIME_CLOCK_100MHZ   0x00000
 #if 0
 #define CONFIG_SYS_LIME_CLOCK_133MHZ   0x10000
 #endif
 
-/* SDRAM Parameter register */
-#define CONFIG_SYS_LIME_MMR            0xC1FCFFFC
 /* SDRAM parameter value; was 0x414FB7F2, caused several vertical bars
    and pixel flare on display when 133MHz was configured. According to
    SDRAM chip datasheet CAS Latency is 3 for 133MHz and -75 Speed Grade */
 #ifdef CONFIG_SYS_LIME_CLOCK_133MHZ
-#define CONFIG_SYS_LIME_MMR_VALUE      0x414FB7F3
+#define CONFIG_SYS_MB862xx_MMR 0x414FB7F3
+#define CONFIG_SYS_MB862xx_CCF CONFIG_SYS_LIME_CLOCK_133MHZ
 #else
-#define CONFIG_SYS_LIME_MMR_VALUE      0x414FB7F2
+#define CONFIG_SYS_MB862xx_MMR 0x414FB7F2
+#define CONFIG_SYS_MB862xx_CCF CONFIG_SYS_LIME_CLOCK_100MHZ
 #endif
 
 /*-----------------------------------------------------------------------