drivers/mtd: Move conditional compilation to Makefile

[platform/kernel/u-boot.git] / include / configs / lwmon5.h

diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index ced7ba6..3d135c4 100644 (file)
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * This program is free software; you can redistribute it and/or
@@ -75,8 +75,8 @@
 /*
  * On LWMON5 we use D-cache as init-ram and stack pointer. We also move
  * the POST_WORD from OCM to a 440EPx register that preserves it's
- * content during reset (GPT0_COM6). This way we reserve the OCM (16k)
- * for logbuffer only.
+ * content during reset (GPT0_COMP6). This way we reserve the OCM (16k)
+ * for logbuffer only. (GPT0_COMP1-COMP5 are reserved for logbuffer header.)
  */
 #define CFG_INIT_RAM_DCACHE    1               /* d-cache as init ram  */
 #define CFG_INIT_RAM_ADDR      0x70000000              /* DCache       */
@@ -86,15 +86,22 @@
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 #define CFG_POST_ALT_WORD_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP6)
                                                /* unused GPT0 COMP reg */
+#define CFG_MEM_TOP_HIDE       (4 << 10) /* don't use last 4kbytes     */
+                                       /* 440EPx errata CHIP 11        */
+#define CFG_OCM_SIZE           (16 << 10)
 
 /* Additional registers for watchdog timer post test */
 
-#define CFG_DSPIC_TEST_ADDR    (CFG_PERIPHERAL_BASE + GPT0_COMP5)
-#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
-#define CFG_WATCHDOG_FLAGS_ADDR        (CFG_PERIPHERAL_BASE + GPT0_COMP5)
+#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2)
+#define CFG_WATCHDOG_FLAGS_ADDR        (CFG_PERIPHERAL_BASE + GPT0_MASK1)
+#define CFG_DSPIC_TEST_ADDR    CFG_WATCHDOG_FLAGS_ADDR
+#define CFG_OCM_STATUS_ADDR    CFG_WATCHDOG_FLAGS_ADDR
 #define CFG_WATCHDOG_MAGIC     0x12480000
 #define CFG_WATCHDOG_MAGIC_MASK        0xFFFF0000
 #define CFG_DSPIC_TEST_MASK    0x00000001
+#define CFG_OCM_STATUS_OK      0x00009A00
+#define CFG_OCM_STATUS_FAIL    0x0000A300
+#define CFG_OCM_STATUS_MASK    0x0000FF00
 
 /*-----------------------------------------------------------------------
  * Serial Port
@@ -117,7 +124,7 @@
  * FLASH related
  *----------------------------------------------------------------------*/
 #define CFG_FLASH_CFI                          /* The flash is CFI compatible  */
-#define CFG_FLASH_CFI_DRIVER                   /* Use common CFI driver        */
+#define CONFIG_FLASH_CFI_DRIVER                        /* Use common CFI driver        */
 
 #define CFG_FLASH0             0xFC000000
 #define CFG_FLASH1             0xF8000000
@@ -149,12 +156,8 @@
 #define CFG_MBYTES_SDRAM       (256)           /* 256MB                        */
 #define CFG_DDR_CACHED_ADDR    0x40000000      /* setup 2nd TLB cached here    */
 #define CONFIG_DDR_DATA_EYE    1               /* use DDR2 optimization        */
-#if 0 /* test-only: disable ECC for now */
 #define CONFIG_DDR_ECC         1               /* enable ECC                   */
 #define CFG_POST_ECC_ON                CFG_POST_ECC
-#else
-#define CFG_POST_ECC_ON                0
-#endif
 
 /* POST support */
 #define CONFIG_POST            (CFG_POST_CACHE    | \
@@ -164,6 +167,7 @@
                                 CFG_POST_FPU      | \
                                 CFG_POST_I2C      | \
                                 CFG_POST_MEMORY   | \
+                                CFG_POST_OCM      | \
                                 CFG_POST_RTC      | \
                                 CFG_POST_SPR      | \
                                 CFG_POST_UART     | \
@@ -244,6 +248,7 @@
 
 #define CFG_POST_CACHE_ADDR    0x7fff0000 /* free virtual address      */
 #define CONFIG_LOGBUFFER
+/* Reserve GPT0_COMP1-COMP5 for logbuffer header */
 #define CONFIG_ALT_LH_ADDR     (CFG_PERIPHERAL_BASE + GPT0_COMP1)
 #define CONFIG_ALT_LB_ADDR     (CFG_OCM_BASE)
 #define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
@@ -272,7 +277,8 @@
 #define        CONFIG_POST_KEY_MAGIC   "3C+3E" /* press F3 + F5 keys to force POST */
 #if 0
 #define        CONFIG_AUTOBOOT_KEYED           /* Enable "password" protection */
-#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
+#define CONFIG_AUTOBOOT_PROMPT \
+       "\nEnter password - autoboot in %d sec...\n", bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR      "  "    /* "password"   */
 #endif
 
@@ -434,7 +440,6 @@
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 #define CONFIG_LOOPW            1       /* enable loopw command         */
 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
-#define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
 #define CONFIG_VERSION_VARIABLE 1      /* include version env variable */
 
 /*-----------------------------------------------------------------------
@@ -455,6 +460,7 @@
 
 #define CONFIG_HW_WATCHDOG     1       /* Use external HW-Watchdog     */
 #define CONFIG_WD_PERIOD       40000   /* in usec */
+#define CONFIG_WD_MAX_RATE     66600   /* in ticks */
 
 /*
  * For booting Linux, the board info and command line data