/*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
#define CONFIG_MPC823 1 /* This is a MPC823E CPU */
#define CONFIG_LWMON 1 /* ...on a LWMON board */
-#define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */
+/* Default Ethernet MAC address */
+#define CONFIG_ETHADDR 00:11:B0:00:00:00
+
+/* The default Ethernet MAC address can be overwritten just once */
+#ifdef CONFIG_ETHADDR
+#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */
#define CONFIG_LCD 1 /* use LCD controller ... */
#define CONFIG_HLD1045 1 /* ... with a HLD1045 display */
-#if 1
+#define CONFIG_LCD_LOGO 1 /* print our logo on the LCD */
+#define CONFIG_LCD_INFO 1 /* ... and some board info */
+#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
+
+#define CONFIG_SERIAL_MULTI 1
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
-#else
-#define CONFIG_8xx_CONS_SCC2
-#endif
+#define CONFIG_8xx_CONS_SCC2 1 /* Console is on SCC2 */
#define CONFIG_BAUDRATE 115200 /* with watchdog >= 38400 needed */
CFG_POST_I2C | \
CFG_POST_SPI | \
CFG_POST_USB | \
- CFG_POST_SPR)
+ CFG_POST_SPR | \
+ CFG_POST_SYSMON)
+
+/*
+ * Keyboard commands:
+ * # = 0x28 = ENTER : enable bootmessages on LCD
+ * 2 = 0x3A+0x3C = F1 + F3 : enable update mode
+ * 3 = 0x3C+0x3F = F3 + F6 : enable test mode
+ */
-#define CONFIG_BOOTCOMMAND "run flash_self"
+#define CONFIG_BOOTCOMMAND "autoscr 40040000;saveenv"
+/* "gatewayip=10.8.211.250\0" \ */
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr=40080000\0" \
"ramdisk_addr=40280000\0" \
- "magic_keys=#3\0" \
+ "netmask=255.255.192.0\0" \
+ "serverip=10.8.2.101\0" \
+ "ipaddr=10.8.57.0\0" \
+ "magic_keys=#23\0" \
"key_magic#=28\0" \
"key_cmd#=setenv addfb setenv 'bootargs $bootargs console=tty0'\0" \
+ "key_magic2=3A+3C\0" \
+ "key_cmd2=echo *** Entering Update Mode ***;" \
+ "if fatload ide 0:3 10000 update.scr;" \
+ "then autoscr 10000;" \
+ "else echo *** UPDATE FAILED ***;" \
+ "fi\0" \
"key_magic3=3C+3F\0" \
"key_cmd3=echo *** Entering Test Mode ***;" \
"setenv add_misc 'setenv bootargs $bootargs testmode'\0" \
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#define CONFIG_WATCHDOG 1 /* watchdog enabled */
+#define CFG_WATCHDOG_FREQ (CFG_HZ / 20)
#undef CONFIG_STATUS_LED /* Status LED disabled */
else immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY udelay(1) /* 1/4 I2C clock duration */
+#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BMP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
+#define CONFIG_CMD_DIAG
#endif
-#ifdef CONFIG_8xx_CONS_SCC2 /* Can't use ethernet, then */
-#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & ~CFG_CMD_NET) | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_IDE | \
- CFG_CMD_BSP | \
- CFG_CMD_BMP | \
- CFG_CMD_POST_DIAG )
-#else
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_IDE | \
- CFG_CMD_BSP | \
- CFG_CMD_BMP | \
- CFG_CMD_POST_DIAG )
-#endif
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/*----------------------------------------------------------------------*/
/*
* Miscellaneous configurable options
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
-#endif
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#endif
+/*----------------------------------------------------------------------*/
+#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
+#undef CONFIG_MODEM_SUPPORT_DEBUG
+
+#define CONFIG_MODEM_KEY_MAGIC "3C+3D" /* press F3 + F4 keys to enable modem */
+#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
+#if 0
+#define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */
+#define CONFIG_AUTOBOOT_PROMPT \
+ "\nEnter password - autoboot in %d sec...\n", bootdelay
+#define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */
+#endif
+/*----------------------------------------------------------------------*/
+
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
*/
#define CFG_INIT_RAM_ADDR CFG_IMMR
#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_SIZE 68 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
#define CFG_FLASH_ERASE_TOUT 180000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 600 /* Timeout for Flash Write (in ms) */
+#define CFG_FLASH_USE_BUFFER_WRITE
+#define CFG_FLASH_BUFFER_WRITE_TOUT 2048 /* Timeout for Flash Buffer Write (in ms) */
+/* Buffer size.
+ We have two flash devices connected in parallel.
+ Each device incorporates a Write Buffer of 32 bytes.
+ */
+#define CFG_FLASH_BUFFER_SIZE (2*32)
-#if 1
-/* Put environment in flash which is much faster to boot */
+/* Put environment in flash which is much faster to boot than using the EEPROM */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_ADDR 0x40040000 /* Address of Environment Sector */
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment */
#define CFG_ENV_SECT_SIZE 0x40000 /* we have BIG sectors only :-( */
-#else
-/* Environment in EEPROM */
-#define CFG_ENV_IS_IN_EEPROM 1
-#define CFG_ENV_OFFSET 0
-#define CFG_ENV_SIZE 2048
-#endif
+
/*-----------------------------------------------------------------------
* I2C/EEPROM Configuration
*/
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET 0x0100
+#define CONFIG_SUPPORT_VFAT /* enable VFAT support */
+
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
*
*/
-/*#define CFG_DER 0x2002000F*/
#define CFG_DER 0
/*
projects / platform / kernel / u-boot.git / blobdiff