Convert CONFIG_SPL_PAD_TO et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls2080ardb.h

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 674d27f..cdfc9fd 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -9,21 +9,9 @@
 
 #include "ls2080a_common.h"
 
-#ifdef CONFIG_FSL_QSPI
-#ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_QIXIS_I2C_ACCESS
-#endif
-#endif
-
 #define I2C_MUX_CH_VOL_MONITOR         0xa
 #define I2C_VOL_MONITOR_ADDR           0x38
-#define CONFIG_VOL_MONITOR_IR36021_READ
-#define CONFIG_VOL_MONITOR_IR36021_SET
 
-#define CONFIG_VID_FLS_ENV             "ls2080ardb_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
 /* step the IR regulator in 5mV increments */
 #define IR_VDD_STEP_DOWN               5
 #define IR_VDD_STEP_UP                 5
@@ -31,12 +19,7 @@
 #define VDD_MV_MIN                     819
 #define VDD_MV_MAX                     1212
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
-#define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
+#define COUNTER_FREQUENCY_REAL         (get_board_sys_clk()/4)
 
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #define SPD_EEPROM_ADDRESS1    0x51
@@ -47,23 +30,15 @@ unsigned long get_board_sys_clk(void);
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
-#define CONFIG_DIMM_SLOTS_PER_CTLR             2
-#define CONFIG_CHIP_SELECTS_PER_CTRL           4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
 
 /* SATA */
-#define CONFIG_SCSI_AHCI_PLAT
 
 #define CONFIG_SYS_SATA1                       AHCI_BASE_ADDR1
 #define CONFIG_SYS_SATA2                       AHCI_BASE_ADDR2
 
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID            1
-#define CONFIG_SYS_SCSI_MAX_LUN                        1
-#define CONFIG_SYS_SCSI_MAX_DEVICE             (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
-                                               CONFIG_SYS_SCSI_MAX_LUN)
-
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
@@ -98,7 +73,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
@@ -144,7 +118,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_LBMAP_SWITCH             0x06
 #define QIXIS_LBMAP_MASK               0x0f
 #define QIXIS_LBMAP_SHIFT              0
@@ -201,7 +174,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NAND_FTIM3
 
-#define CONFIG_SPL_PAD_TO              0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (512 * 1024)
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
@@ -230,7 +202,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
 #ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_QMAP_MASK                        0x07
 #define QIXIS_QMAP_SHIFT               5
 #define QIXIS_LBMAP_DFLTBANK           0x00
@@ -258,9 +229,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#if defined(CONFIG_FSL_DSPI)
-#define CONFIG_SPI_FLASH_STMICRO
-#endif
 
 /*
  * RTC configuration
@@ -354,7 +322,6 @@ unsigned long get_board_sys_clk(void);
        "ramdisk_size=0x2000000\0"              \
        "fdt_high=0xa0000000\0"                 \
        "initrd_high=0xffffffffffffffff\0"      \
-       "fdt_addr=0x64f00000\0"                 \
        "kernel_addr=0x581000000\0"             \
        "kernel_start=0x1000000\0"              \
        "kernelheader_start=0x800000\0"         \
@@ -417,7 +384,6 @@ unsigned long get_board_sys_clk(void);
        "ramdisk_size=0x2000000\0"              \
        "fdt_high=0xa0000000\0"                 \
        "initrd_high=0xffffffffffffffff\0"      \
-       "fdt_addr=0x64f00000\0"                 \
        "kernel_addr=0x581000000\0"             \
        "kernel_start=0x1000000\0"              \
        "kernelheader_start=0x600000\0"         \
@@ -526,7 +492,6 @@ unsigned long get_board_sys_clk(void);
 #define AQ_PHY_ADDR3           0x02
 #define AQ_PHY_ADDR4           0x03
 #define AQR405_IRQ_MASK                0x36
-#define CONFIG_ETHPRIME                "DPMAC1@xgmii"
 
 #include <asm/fsl_secure_boot.h>