#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SCSI
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
#define CONFIG_FSL_QIXIS /* use common QIXIS code */
#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
-#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET (2048 * 1024)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
-#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x2000
/* EEPROM */
#define CONFIG_ID_EEPROM
-#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#undef CONFIG_CMDLINE_EDITING
#include <config_distro_defaults.h>
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581100000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"mcmemsize=0x40000000\0" \
"fdtfile=fsl-ls2080a-rdb.dtb\0" \
- "mcinitcmd=esbc_validate 0x580c80000;" \
- "esbc_validate 0x580cc0000;" \
- "fsl_mc start mc 0x580300000" \
- " 0x580800000 \0" \
+ "mcinitcmd=esbc_validate 0x580700000;" \
+ "esbc_validate 0x580740000;" \
+ "fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0" \
BOOTENV
#else
#ifdef CONFIG_QSPI_BOOT