Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI

[platform/kernel/u-boot.git] / include / configs / ls2080aqds.h

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b3fce1b..e67dee0 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -11,25 +11,17 @@
 
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_QIXIS_I2C_ACCESS
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_EARLY_INIT
-#endif
 #define CONFIG_SYS_I2C_IFDR_DIV                0x7e
 #endif
 
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
 
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
@@ -108,7 +100,6 @@ unsigned long get_board_ddr_clk(void);
                                         CONFIG_SYS_FLASH_BASE + 0x40000000}
 #endif
 
-#define CONFIG_NAND_FSL_IFC
 #define CONFIG_SYS_NAND_MAX_ECCPOS     256
 #define CONFIG_SYS_NAND_MAX_OOBFREE    2
 
@@ -127,8 +118,6 @@ unsigned long get_board_ddr_clk(void);
                                | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
 
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
 /* ONFI NAND Flash mode0 Timing Params */
 #define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x07) | \
                                        FTIM0_NAND_TWP(0x18)   | \
@@ -147,8 +136,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_LBMAP_SWITCH             0x06
 #define QIXIS_LBMAP_MASK               0x0f
@@ -221,7 +208,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NAND_FTIM3
 
 #define CONFIG_SPL_PAD_TO              0x20000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 * 1024)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (640 * 1024)
 #endif
 #else
@@ -304,13 +290,8 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 
 /* EEPROM */
-#define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM      0
-#define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
 #define CONFIG_FSL_MEMAC
 
@@ -318,11 +299,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #ifdef CONFIG_NXP_ESBC
@@ -345,7 +321,7 @@ unsigned long get_board_ddr_clk(void);
 #else
 #ifdef CONFIG_TFABOOT
 #define SD_MC_INIT_CMD                         \
-       "mmcinfo;mmc read 0x80a00000 0x5000 0x1200;"  \
+       "mmcinfo;mmc read 0x80a00000 0x5000 0x1000;"  \
        "mmc read 0x80e00000 0x7000 0x800;" \
        "fsl_mc start mc 0x80a00000 0x80e00000\0"
 #define IFC_MC_INIT_CMD                                \
@@ -418,9 +394,9 @@ unsigned long get_board_ddr_clk(void);
        "kernel_start=0x8000\0"              \
        "kernel_load=0xa0000000\0"              \
        "kernel_size=0x14000\0"               \
-       "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;"  \
-       "mmc read 0x80100000 0x7000 0x800;" \
-       "fsl_mc start mc 0x80000000 0x80100000\0"       \
+       "mcinitcmd=mmcinfo;mmc read 0x80a00000 0x5000 0x1000;"  \
+       "mmc read 0x80e00000 0x7000 0x800;" \
+       "fsl_mc start mc 0x80a00000 0x80e00000\0"       \
        "mcmemsize=0x70000000 \0"
 #else
 #define CONFIG_EXTRA_ENV_SETTINGS              \