Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video...

[platform/kernel/u-boot.git] / include / configs / ls2080a_common.h

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index c7d8a3b..9027bd0 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -7,9 +7,6 @@
 #ifndef __LS2_COMMON_H
 #define __LS2_COMMON_H
 
-#define CONFIG_REMAKE_ELF
-#define CONFIG_GICV3
-
 #include <asm/arch/stream_id_lsch3.h>
 #include <asm/arch/config.h>
 
@@ -23,16 +20,6 @@
 /* We need architecture specific misc initializations */
 
 /* Link Definitions */
-#ifndef CONFIG_TFABOOT
-#ifndef CONFIG_QSPI_BOOT
-#else
-#define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
-#define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
-#define CONFIG_ENV_SECT_SIZE           0x40000
-#endif
-#endif
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
 
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
@@ -50,7 +37,7 @@
 /*
  * SMP Definitinos
  */
-#define CPU_RELEASE_ADDR               secondary_boot_func
+#define CPU_RELEASE_ADDR               secondary_boot_addr
 
 #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
@@ -71,22 +58,15 @@
  */
 #define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2048 * 1024)
+/* GPIO */
 
 /* I2C */
-#define CONFIG_SYS_I2C
 
 /* Serial Port */
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE     1
 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
 
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
-
-/* IFC */
-#define CONFIG_FSL_IFC
-
 /*
  * During booting, IFC is mapped at the region of 0x30000000.
  * But this region is limited to 256MB. To accommodate NOR, promjet
@@ -140,11 +120,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH   0x200000
 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET  0x07000000
 
-/* Define phy_reset function to boot the MC based on mcinitcmd.
- * This happens late enough to properly fixup u-boot env MAC addresses.
- */
-#define CONFIG_RESET_PHY_R
-
 /*
  * Carve out a DDR region which will not be used by u-boot/Linux
  *
@@ -155,21 +130,14 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (128UL * 1024 * 1024)
 #endif
 
-/* Command line configuration */
-
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
 
 /* Physical Memory Map */
 /* fixme: these need to be checked against the board */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128
 
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
@@ -186,19 +154,6 @@ unsigned long long get_qixis_addr(void);
        "mcinitcmd=fsl_mc start mc 0x580a00000" \
        " 0x580e00000 \0"
 
-#ifndef CONFIG_TFABOOT
-#ifdef CONFIG_SD_BOOT
-#define CONFIG_BOOTCOMMAND     "mmc read 0x80200000 0x6800 0x800;"\
-                               " fsl_mc apply dpl 0x80200000 &&" \
-                               " mmc read $kernel_load $kernel_start" \
-                               " $kernel_size && bootm $kernel_load"
-#else
-#define CONFIG_BOOTCOMMAND     "fsl_mc apply dpl 0x580d00000 &&" \
-                               " cp.b $kernel_start $kernel_load" \
-                               " $kernel_size && bootm $kernel_load"
-#endif
-#endif
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */
 #define CONFIG_SYS_MAXARGS             64      /* max command args */