configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls1088aqds.h

diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index d9d7af2..2d33ab0 100644 (file)
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -8,33 +8,18 @@
 
 #include "ls1088a_common.h"
 
-
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#ifdef CONFIG_TFABOOT
-#define CONFIG_MISC_INIT_R
-#endif
-
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define SYS_NO_FLASH
-
-#define CONFIG_SYS_CLK_FREQ            100000000
 #else
 #define CONFIG_QIXIS_I2C_ACCESS
-#define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #endif
 
-#define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
+#define COUNTER_FREQUENCY_REAL         (get_board_sys_clk()/4)
 #define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
@@ -87,7 +72,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_BANKS     2       /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
@@ -98,7 +82,6 @@ unsigned long get_board_sys_clk(void);
 #endif
 #endif
 
-#define CONFIG_NAND_FSL_IFC
 #define CONFIG_SYS_NAND_MAX_ECCPOS     256
 #define CONFIG_SYS_NAND_MAX_OOBFREE    2
 
@@ -117,8 +100,6 @@ unsigned long get_board_sys_clk(void);
                                | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
 
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
 /* ONFI NAND Flash mode0 Timing Params */
 #define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x07) | \
                                        FTIM0_NAND_TWP(0x18)   | \
@@ -137,8 +118,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #define CONFIG_FSL_QIXIS
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define QIXIS_LBMAP_SWITCH             6
@@ -310,16 +289,10 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 #define I2C_SVDD_MONITOR_ADDR           0x4F
 
-#define CONFIG_VID_FLS_ENV              "ls1088aqds_vdd_mv"
-#define CONFIG_VID
-
 /* The lowest and highest voltage allowed for LS1088AQDS */
 #define VDD_MV_MIN                     819
 #define VDD_MV_MAX                     1212
 
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 #define PWM_CHANNEL0                    0x0
 
 /*
@@ -333,9 +306,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_EEPROM_BUS_NUM              0
 
 #ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_SST
-#define CONFIG_SPI_FLASH_EON
 #if !defined(CONFIG_TFABOOT) && \
        !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #endif
@@ -547,7 +517,6 @@ unsigned long get_board_sys_clk(void);
 #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf
 
 #define CONFIG_ETHPRIME                "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 
 #endif