#endif
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#else
-#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FSL_QSPI_BASE + \
- CONFIG_ENV_OFFSET)
-#endif
-#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* SMP Definitinos
*/
-#define CPU_RELEASE_ADDR secondary_boot_func
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
/* I2C */
+#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
+#endif
+
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024)
#endif
-/* Command line configuration */
-#define CONFIG_CMD_CACHE
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* #define CONFIG_DISPLAY_CPUINFO */
#ifndef SPL_NO_ENV
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
/*
* HDR would be appended at end of image and copied to DDR along
#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
#else
#define CONFIG_SYS_MONITOR_LEN 0x100000
-#endif /* ifdef CONFIG_SECURE_BOOT */
+#endif /* ifdef CONFIG_NXP_ESBC */
#endif
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */