/* Link Definitions */
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
*/
#define CPU_RELEASE_ADDR secondary_boot_addr
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
+/* GPIO */
+#ifdef CONFIG_DM_GPIO
+#ifndef CONFIG_MPC8XXX_GPIO
+#define CONFIG_MPC8XXX_GPIO
+#endif
+#endif
/* I2C */
-#ifndef CONFIG_DM_I2C
-#define CONFIG_SYS_I2C
-#endif
/* Serial Port */
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* SATA */
#ifdef CONFIG_SCSI
/* #define CONFIG_DISPLAY_CPUINFO */
#ifndef SPL_NO_ENV
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \